Programmable integrated circuit devices are powerful logic devices able to implement many logic functions. Field programmable gate array devices having programmable logic blocks and programmable interconnect structure are a particularly powerful form of such devices. Several families of field programmable gate array devices available from Xilinx, Inc., assignee of the present invention, include a fast carry path able to speed up certain functions, particularly arithmetic functions in which the slowest part of the operation is rippling the carry signal from one bit to the next in a large number.
FIG. 1 shows a logic block structure available in the Xilinx XC5200 devices, which is described in detail by Tavana et al. in U.S. Pat. No. 5,682,107, the contents of which is incorporated herein by reference. FIG. 1 shows four adjacent stages, the F-stage, G-stage, H-stage, and J-stage having adjacent four-input lookup tables F, G, H, and J and an associated carry chain including carry multiplexers C1, C2, C3, and C4. Also included are registers RX, RY, RZ, and RV able to receive respective data input signals from lookup tables (LUTs) F, G, H, and J, respectively. Various multiplexers route signals between the LUT, carry multiplexer, and registers of a stage. In particular, multiplexers D1-D4 select between routing the LUT output signal and the carry multiplexer output signal to the register.
Similar architectures are also known, in particular one in which XOR gates replace multiplexers D1-D4. Combining the LUT output signal and the carry-in signal in an XOR gate as input to the register allows both carry and sum portions of an arithmetic function to be efficiently generated.
A loadable up-down counter can be formed using the structure of FIG. 1. Such an implementation was published in January 1998 by Xilinx, Inc. in the "Libraries Guide, Xilinx Development System" at pages 3-89 through 3-91 and 3-93. That publication is incorporated herein by reference. However, each bit of this loadable up-down counter requires 3 LUTs. It would be desirable to achieve a higher density in such counters.